Operational transconductance amplifiers are well-known electronic devices that are used in a wide variety of applications such as electronically tunable filters and analog signal processors. An ideal OTA includes a transconductance stage that converts a voltage signal into a current signal in such a manner that the amplifier presents a very high input impedance to the input signal source and a very low output impedance to the load. In addition, the ideal OTA would have a very high input-voltage-to-output-current conversion factor, which is referred to as its transconductance. FIG. 1 shows a conventional OTA implemented in the CMOS (Complementary Metal-Oxide Semiconductor) technology. An NMOS transistor 1 acts as a current source to a pair of NMOS input transistors 2 and 3, whose gate terminals are coupled to a pair of differential signals v.sub.in1.sup.+ and v.sub.in1.sup.-, respectively. Variations in the input signals v.sub.in1.sup.+ and v.sub.in1.sup.- induce changes in the respective drain currents I.sub.1 and I.sub.2 of the transistors 2 and 3. The amount of current difference between the input transistors 2 and 3 is given by I.sub.1 -I.sub.2 =g.sub.m1 *(v.sub.in1.sup.+ -v.sub.in1.sup.-), where g.sub.m1 is the transconductance for each of the NMOS transistors 2 and 3.
Two PMOS transistors 4 and 5 provide an equal amount of current to each of the NMOS transistors 2 and 3. Optionally, the OTA may include another pair of differential NMOS transistors (not shown) similar to the NMOS transistors 2 and 3, for receiving an additional differential input. A second current source would also be needed to drive the second NMOS transistor pair. The drain terminals of the second NMOS transistors would be connected to those of the NMOS transistors 2 and 3, respectively. The gate terminals of the additional NMOS transistors would receive a second pair of differential input signals, e.g., v.sub.in2.sup.+ and v.sub.in2.sup.-, respectively. The output terminals 6 and 7 of the OTA behave as a pair of differential current sources that draw current in and out of the OTA. The differential current at the output of the OTA is the same as the current difference between the input transistors 2 and 3 given above, which is g.sub.m1 *(v.sub.in1.sup.+ -v.sub.in1.sup.-), where g.sub.m1 represents the transconductance for each of the differential NMOS transistors 2 and 3.
A feedback circuit 13 on the right side of FIG. 1 controls the common-mode voltage of the OTA's outputs 6 and 7. The feedback circuit 13 comprises an PMOS transistor 10 with its source coupled to the OTA's supply voltage V.sub.dd, its drain and gate coupled to the gate terminals of the PMOS transistors 4-5. An NMOS transistor 12 serves as a current source to the transistors 8-11 of the feedback circuit 13. The gate of the NMOS transistor 11 is connected to a reference voltage V.sub.REF. A pair of NMOS transistors (8 and 9) is provided for sensing the OTA's outputs 6 and 7, with their gates connected to the OTA's output signals v.sub.out.sup.+ and v.sub.out.sup.-. The average of v.sub.out.sup.+ and v.sub.out.sup.-, is compared by the NMOS transistor 11 to a reference voltage V.sub.REF. If this average is higher than V.sub.REF, then the OTA's outputs 6 and 7 will be forced down until it is equal to V.sub.REF. In other words, the common-mode voltage OTA's outputs is equal to V.sub.REF.
FIG. 2 shows a simplified circuit diagram of the OTA of FIG. 1, in which the common-mode voltage control circuit 13 is represented as a single element 13. Next, FIG. 3 shows a common circuit symbol for differential OTAs, such as the one described above in reference to FIGS. 1 and 2. By interconnecting several such OTAs in different configurations, one can perform desired mathematical manipulations of the input signals v.sub.in1.sup.+ and v.sub.in1.sup.-. For example, a number of so-called "integrators", each consisting of an OTA and a capacitor, may be connected in series to form an electronically tunable filter that is commonly used in communication applications. An example of such a filter constructed using the differential OTA of the invention will be described in detail later in the specification, with reference to FIG. 10.
One of the problems with conventional CMOS OTAs is their high power consumption. In low-power portable applications of OTAs, especially those with high-frequency filter components, it is very desirable to have a large transconductance for the OTAs. However, for OTAs implemented in CMOS technology, the CMOS transistors making up these OTAs typically have a transconductance g.sub.m that is relatively low compared to that of bipolar transistors operating at the same DC current. Since the transconductance of a CMOS transistor is proportional to the square root of its DC current, this DC current would need to be increased four times in order to double the transconductance of the transistor. Unfortunately, this would result in a fourfold increase in the OTA's power dissipation.
Another drawback of conventional CMOS OTAs is their relatively large output conductance. Consider the prior art differential OTA of FIG. 1, an equivalent circuit of this OTA is shown by the circuit diagram of FIG. 4, with its output conductance and capacitance being represented by g.sub.o and C.sub.o, respectively,. As shown by the OTA's equivalent circuit, the output conductance g.sub.o of the OTA is in shunt with its output capacitance C.sub.o. This finite output conductance acts as a shunt to the output current i.sub.o and reduces the magnitude of the output AC current to be delivered to the load. As a result, the output frequency response of the OTA, and consequently its bandwidth, are significantly degraded.
In some prior art OTAs, attempts have been made to reduce their output conductance by adding a PMOS stage to limit the variation of the current source of the OTA, and thus reducing the OTAs' output conductance. FIG. 5 shows the circuit diagram of a prior art OTA with this additional transistor stage for improving the OTA's output conductance. Similar to the differential OTA of FIG. 1, this OTA includes a pair of input NMOS transistors 17 and 18 driven by a current source 19. The PMOS transistors 20 and 21 provide a common-mode control circuit, similar to the PMOS transistors 4 and 5 in FIG. 1, respectively. A second PMOS transistor stage, consisting of transistors 22 and 23, is added between the common-mode control circuit and the input transistors 17-18. Since the drain voltage of the PMOS transistors 20-21 does not swing as much as the OTA's output signals v.sub.out.sup.+ and v.sub.out.sup.-, these transistors act as a current source with a very small output conductance. A disadvantage of this solution is that the additional PMOS stage can only be used when the OTA is implemented in CMOS technology with a sufficient power supply voltage, e.g., V.sub.dd =5 V. However, as the CMOS technology is scaled down to a smaller dimension for higher speed and larger integration, the value of V.sub.dd becomes lower and lower. The stacking of an additional layer of PMOS transistors in a low-V.sub.dd circuit is thus very undesirable, if not impossible. Accordingly, the use of a second PMOS transistor stage to reduce an OTA's output conductance is becoming less desirable in today's advanced CMOS circuits.
In the article "A 2.7 V 900 MHz CMOS LNA and Mixer," Digest of IEEE International Solid-State Circuits Conference, 1996, p. 50, A. N. Karanicolas describes a low-noise amplifier using the transconductance of its inverters. A simplified circuit diagram of this amplifier is illustrated in FIG. 6. The low-noise amplifier includes a DC-level voltage control circuit 24, an AC-coupled single-ended inverting amplifying circuit 25, and another DC-level voltage control circuit 26. As shown by FIG. 6, the DC-level voltage control circuit 26 is controlled by resistor 27 and capacitors 28-29. However, in today's highly integrated circuits, these resistor and capacitor components are undesirable because they increase the physical size and cost of the amplifier.
Another design of a CMOS transconductance amplifier is described by B. Nauta in "A CMOS Transconductance-C Filter Technique for Very High-frequencies," IEEE Journal of Solid State Circuits, V.27, No.2, p. 142, February, 1992. Here, the high-frequency amplifier is part of a differential transconductance filter using CMOS inverters. FIG. 7 shows a circuit diagram for this amplifier, in which two inverters 30 and 31 form a differential input pair for receiving the input signals v.sub.in.sup.+ and v.sub.in.sup.-. Additional pairs of inverters, e.g., the pair of inverters 32 and 33, are used to control the common-mode voltage of the OTA's output v.sub.out.sup.+ and v.sub.out.sup.-. Although the CMOS inverters 30 and 31 provide a transconductance for the amplifier, they are not a true differential pair because they do not draw current from a single current source. The described amplifier thus lacks a common-mode noise rejection capability.
Therefore, there remains a need for an OTA that accepts a differential input, has means for controlling its output conductance and a relatively large transconductance for low power consumption.